Part Number Hot Search : 
MC155 A1206 AD8031B PESD5 UC2842A MA103 N4111 TA1067A
Product Description
Full Text Search
 

To Download HFCT-5701LP Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
 Agilent HFCT-5701L/LP Single Mode Laser Small Form Factor Pluggable (SFP) Transceivers for 1.25 GBd Ethernet and 1.0625 GBd Fibre Channel Applications
Data Sheet
Description The HFCT-5701L/LP Small Form Factor Pluggable LC optical transceiver is compliant with both the IEEE 802.3Z (1000BASE-LX) and Fiber Channel 100-SM-LC-L, also it complies to Small Form Factor Pluggable (SFP) Multi-Source Agreement (MSA) specifications. The transceiver is intended for premise, public and access networking equipment. The product transmits data over single mode cable for a link distance of 10 km, which is in excess of the standard. The transmitter section incorporates a 1300 nm Fabry Perot (FP) laser. The transmitter has full IEC 825 and CDRH Class 1 eye safety. Features * IEEE 802.3Z Gigabit Ethernet (1.25 GBd) 1000BASE-LX compliant * Compliant with ANSI Fiber Channel Physical Interfaces (FCPI Rev 13) * Small Form Factor Pluggable (SFP) Multi-Source Agreement (MSA) compliant * Manufactured in an ISO 9001 "compliant facility" * Hot-pluggable * HFCT-5701LP bail wire delatch HFCT-5701L standard delatch * +3.3 V dc power supply * 1310 nm longwave laser * Eye safety certified: - US 21 CFR(J) - IEC 60825-1 (+All) * LC-Duplex fiber connector compatible * Fiber compatibility: - 2 m to 10 km with 9 m SM fiber - 2 m to 550 m with 62.5 m MM fiber Applications * Switch to switch applications * Switched backplane applications * High Speed Interface for server farms * Metro access switch GbE connections Related Products * HFBR-5701L/LP: 850 nm 1.25 GBd 3.3 V multimode SFP Gigabit Ethernet transceiver * HDMP-1687: Quad Channel SerDes IC 1.25 GBd Ethernet * HDMP-1646A: Single Channel SerDes IC for 1.25 GBd Ethernet and 1.0625 GBd Fibre Channel
General Features The receiver section for the HFCT-5701L/LP contains an InGaAs/InP photo detector and a preamplifier mounted in an optical subassembly. This optical subassembly is coupled to a post amplifier/decision circuit on a circuit board. The design of the optical subassembly is such that it provides better than 12 dB Optical Return Loss (ORL). The HFCT-5701L/LP is complaint to 1 GbE and 1G FC specifications. This includes specifications for the signal coding, optical fiber and connector types, optical and electrical transmitter characteristics, optical and electrical receiver characteristics, jitter characteristics, and compliance testing methodology for the aforementioned. This transceiver is capable of implementing both Single Mode (SM) and Multimode (MM) optical fiber applications in that order of precedence in the event of conflicting specifications. In addition, the SM link type exceeds the 2 m to 5 km 1000BASE-LX specification by achieving compliance over 2 m to 10 km. The MM link type is expected to meet the 62.5 m MMF specification when used with an "offset launch" fiber. The optical connector is LC duplex.
SFP MSA Compliance The product package is compliant with the SFP MSA with the LC connector option. The SFP MSA includes specifications for mechanical packaging and performance as well as dc, ac and control signal timing and performance. The power supply is 3.3 V dc. The High Speed I/O (HSIO) signal interface is a Low Voltage Differential type. It is ac coupled and terminated internally to the module. The internal termination is a 100 Ohm differential load. Operating Temperature The HFCT-5701L/LP has an operating case temperature of 10 to +85 C .
Serial Identification (EEPROM) The HFCT-5701L/LP is compliant with the SFP MSA, which defines the serial identification protocol. This protocol uses the 2-wire serial CMOS E2PROM protocol of the ATMEL AT24C01A or similar. MSA compliant, example contents of the HFCT-5701L/LP serial ID memory are defined in Table 3. Eye Safety For details of product compliance, see Table 1. Delatch Mechanism The delatching mechanism uses the same design as the MM HFBR-5701L. The HFCT-5701L/ LP is designed with an MSA complaint standard delatch as well as an optional bail wire delatch. The bail wire delatch has been slightly modified outside MSA compliance to optimize the mechanical performance of the product. These modifications do not interfere with the overall form, fit and function as specified by the SFP MSA. Power Supply Noise The HFCT-5701L/LP can withstand an injection of PSN on the VCC lines of 100 mV ac without a degradation in eye mask margin to 10% on the transmitter and a 1 dB sensitivity penalty on the receiver. This occurs when the product is used in conjunction with the MSA recommended power supply filter shown in Figure 1.
1 H VCCT 0.1 F 1 H VCCR 0.1 F 10 F 0.1 F 10 F 3.3 V
SFP MODULE
HOST BOARD
Figure 1 - MSA required power supply filter
2
Regulatory Compliance The product meets all of the regulatory compliance listed in Table 1. Table 1 - Regulatory Compliance
Feature
Electrostatic Discharge (ESD) to the Electrical Pins Electrostatic Discharge (ESD) to the Duplex LC Receptacle
Test Method
MIL-STD-883C Method 3015 Bellcore GR1089-CORE
Performance
Class 2 (>2000 Volts) 25 kV Air Discharge
10 Zaps at 8 kV (contact discharge) on the electrical faceplate on panel. Electromagnetic Interference (EMI) FCC Class B Applications with high SFP port counts are expected to be compliant; however, margins are dependent on customer board and chassis design. Immunity Variation of IEC 61000-4-3 No measurable effect from a 10 V/m field swept from 80 to 1000 MHz applied to the transceiver without a chassis enclosure. Eye Safety US FDA CDRH AEL Class 1 CDRH certification # 9521220-52 EN (IEC) 60825-1, 2, TUV file # 933/510206/02 EN60950 Class 1 UL file # E173874 Component Recognition Underwriter's Laboratories and Canadian UL file # E173874 Standards Association Joint Component Recognition for Information Technology Equipment Including Electrical Business Equipment
3
AGILENT HFCT-5701LP 1310 nm LASER PROD 21CFR(J) CLASS 1 COUNTRY OF ORIGIN YYWW XXXXXX
13.80.1 0.5410.004
13.40.1 0.5280.004
2.60 0.10 DEVICE SHOWN WITH DUST CAP AND BAIL WIRE DELATCH
55.20.2 2.170.01
6.250.05 0.2460.002
FRONT EDGE OF SFP TRANSCEIVER CAGE
0.7MAX. UNCOMPRESSED 0.028
13.00.2 0.5120.008
8.50.1 0.3350.004
TX
RX AREA FOR PROCESS PLUG
6.6 0.261
13.50 0.53
14.8MAX. UNCOMPRESSED 0.583 STANDARD DELATCH
12.10.2 0.480.01
DIMENSIONS ARE IN MILLIMETERS (INCHES)
Figure 2a. Drawing of SFP Transceiver
4
Y
X 34.5 10 3x 7.2 2.5 2.5
16.25 MIN.PITCH PCB EDGE B
10x 1.05 0.01 0.1 L X A S 1
7.1 0.85 0.05 0.1 S X Y A 1 3.68
5.68 8.58 11.08 16.25 14.25 REF.
PIN 1
20
2x 1.7
8.48 9.6 11.93 4.8 SEE DET AIL 1 9x 0.95 0.05 0.1 L X A S 2
10
11
2.0 11x 26.8 3 41.3 42.3 10 3x 5
11x 2.0
3.2
5 0.9 20x 0.5 0.03 0.06 L A S B S
PIN 1 9.6 10.93 0.8 TYP. 10
20 10.53 11 11.93
LEGEND 1. PADS AND VIAS ARE CHASSIS GROUND 2. THROUGH HOLES, PLATING OPTIONAL 3. HATCHED AREA DENO TES COMPONENT AND TRACE KEEPOUT (EXCEPT CHASSIS GROUND) 2 0.005 TYP. 0.06 L A S B S 4. AREA DENOTES COMPONENT KEEPOUT (TRA CES ALLO WED) DIMENSIONS ARE IN MILLIMETERS
4 2x 1.55 0.05 0.1 L A S B S DETAIL 1
Figure 2b. SFP host board mechanical layout
5
1.70.9 3.50.3 .14.01 PCB 41.730.5 1.64.02 BEZEL AREA FOR PROCESS PLUG .07.04
15MAX .59
Tcase REFERENCE POINT CAGE ASSEMBLY 15.250.1 .600.004 12.4REF .49 10.40.1 .410.004
9.8MAX .39
1.15REF .05 BELOW PCB
10REF .39 TO PCB 0.40.1 .020.004 BELOW PCB MSA-SPECIFIED BEZEL 16.250.1MIN PITCH .640.004
DIMENSIONS ARE IN MILLIMETERS [INCHES].
Figure 2c.
6
Pin-out Table The pin arrangement and definition of this product meets SFP MSA. Table 2 lists the pin description. Table 2 - Pin description
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
Name VeeT TX Fault TX Disable MOD-DEF2 MOD-DEF1 MOD-DEF0 Rate Select LOS VeeR VeeR VeeR RDRD+ VeeR VccR VccT VeeT TD+ TDVeeT
Function/Description Transmitter Ground Transmitter Fault Indication Transmitter Disable - Module disables on high or open Module Definition 2 - Two wire serial ID interface Module Definition 1 - Two wire serial ID interface Module Definition 0 - Grounded in module Not Connected Loss of Signal Receiver Ground Receiver Ground Receiver Ground Inverse Received Data Out Received Data Out Receiver Ground Receiver Power - 3.3 V 5% Transmitter Power - 3.3 V 5% Transmitter Ground Transmitter Data In Inverse Transmitter Data In Transmitter Ground
MSA Notes Note 1 Note 2 Note 3 Note 3 Note 3 Note 4
Note 5 Note 5 Note 6 Note 6 Note 7 Note 7
Notes: 1) TX Fault is an open collector/drain output, which should be pulled up with a 4.7K - 10K resistor on the host board. Pull up voltage between 2.0 V and VccT, R+0.3 V. When high, output indicates a laser fault of some kind. Low indicates normal operation. In the low state, the output will be pulled to < 0.8 V 2. TX Disable input is used to shut down the laser output per the state table below with an external 4.7 - 10 KW pull-up resistor. Low (0 - 0.8 V): Transmitter on Between (0.8 V and 2.0 V): Undefined High (2.0 - 3.465 V): Transmitter Disabled Open: Transmitter Disabled 3. MOD-DEF 0,1,2. These are the module definition pins. They should be pulled up with a 4.7 - 10 KW resistor on the host board to a supply less than VccT +0.3 V or VccR+0.3 V. MOD-DEF 0 is grounded by the module to indicate that the module is present MOD-DEF 1 is clock line of two wire serial interface for optional serial ID MOD-DEF 2 is data line of two wire serial interface for optional serial ID 4. LOS (Loss of Signal) is an open collector/drain output which should be pulled up externally with a 4.7K - 10 KW resistor on the host board to a supply < VccT,R+0.3 V. When high, this output indicates the received optical power is below the worst case receiver sensitivity (as defined by the standard in use). Low indicates normal operation. In the low state, the output will be pulled to < 0.8 V. 5. RD-/+: These are the differential receiver outputs. They are ac coupled 100W differential lines which should be terminated with 100W differential at the user SERDES. The ac coupling is done inside the module and is thus not required on the host board. The voltage swing on these lines will be between 370 and 1600 mV differential (185 - 800 mV single ended) when properly terminated. 6. VccR and VccT are the receiver and transmitter power supplies. They are defined as 3.135 - 3.465 V at the SFP connector pin. The maximum supply current is 300 mA and the associated inrush current will be no more than 30 mA above steady state after 500 nanoseconds. 7. TD-/+: These are the differential transmitter inputs. They are ac coupled differential lines with 100W differential termination inside the module. The ac coupling is done inside the module and is thus not required on the host board. The inputs will accept differential swings of 500 - 2400 mV (250 1000 mV single ended), though it is recommended that values between 500 and 1200 mV differential (250 - 600 mV single ended) be used for best EMI performance.
7
Absolute Maximum Ratings
Absolute maximum ratings are those values beyond which functional performance is not intended, device reliability is not implied, and damage to the device may occur.
Parameter Storage Temperature (non-operating) Relative Humidity Supply Voltage Input Voltage on any Pin
Symbol TS RH VCC VI
Minimum -40 5 -0.5 -0.5
Maximum +85 85 3.63 VCC
Unit C % V V
Notes
Recommended Operating Conditions
Typical operating conditions are those values for which functional performance and device reliability is implied.
Parameter Case Operating Temperature Supply Voltage
Symbol TC VCC
Minimum -10 3.14
Typical 3.3
Maximum +85 3.47
Unit C V
Notes
Transceiver Electrical Characteristics
Parameter Module supply current Power Dissipation AC Electrical Characteristics Power Supply Noise Rejection (peak - peak) Inrush Current DC Electrical Characteristics Sense Outputs: Transmit Fault (TX_FAULT) Loss of Signal (LOS) MOD-DEF2 Control Inputs: Transmitter Disable (TX_DISABLE) MOD-DEF1, 2 Data Input: Transmitter Differential Input Voltage (TD+/-) Data Ouput: Receiver Differential Output Voltage (RD+/-) Receiver Data Rise and Fall Times
Symbol ICC PDISS PSNR
Minimum
Typical 200 660 100
Maximum 240 762.3
Unit mA mW mV mA
Notes 1 1 2 3
30
VOH VOL VIH VIL VI VO Trf
2.0
VccT, R+0.3 V 0.8 V Vcc 0.8 2000 1600 400 V V mV mV ps
4
2.0
4, 5
500 370
6 7
Notes: 1. Over temperature and Beginning of Life. 2. MSA filter is required on host board 10 Hz to 1 MHz. See Figure 1 (Page 2) 3. Satisfied after 500 nanoseconds. Within 500 nanoseconds, maximum of current of 2000 mA and energy of 700 nanojoules 4. LVTTL, External 4.7 - 10 KW Pull-Up Resistor required 5. LVTTL, Internal 4.7 - 10 KW Pull-Up Resistor required for TX_Disable 6. Internally ac coupled and terminated (100 Ohm differential) 7. Internally ac coupled and load termination located at the user SerDes
8
Transmitter Optical Characteristics
Parameter Symbol Pout Pout Minimum -9.5 -9.5 Typical Maximum -3 -3 Unit dBm dBm Notes SMF IEEE 802.3Z 62.5/125 m NA = 0.2 IEEE 802.3Z 62.5/125 m NA = 0.275 IEEE 802.3Z IEEE 802.3Z
Output Optical Power (Average)
Pout Optical Extinction Ratio Optical Modulation Amplitude Center Wavelength Spectral Width - RMS Optical Rise/Fall Time RIN12 (OMA), maximum Contributed Deterministic Jitter Contributed Total Jitter EXR OMA lC s Trise/fall RIN DJ (1.0625 Gbps) TJ (1.25 Gbps) TJ (1.0625 Gbps)
-9.5 9 130 1270 1.4
-3
dBm dB W nm nm
1355 2.8 320 -120 0.09 0.28 0.284
Fig 3 20% - 80% ps FC-PI rev 13 dB/Hz IEEE 802.3Z 8 UI 8 UI 8 UI
Receiver Optical Characteristics
Parameter Optical Power Receiver Sensitivity Stressed Receiver Sensitivity Receiver Electrical 3 dB Upper Cutoff Frequency Operating Center Wavelength Contributed Total Jitter Return Loss (minimum) Loss of Signal - Deasserted (Average) Loss of Signal - Asserted (Average) Loss of Signal - Hysteresis
Symbol PIN PREC
Minimum
Typical
Maximum -3 -20 -14.4 1500
Unit dBm dBm dBm MHz nm UI dB
Notes IEEE 802.3Z At BER of 10-12 IEEE 802.3Z 8 IEEE 802.3Z
lC 1270 TJ (1.25Gb/s) 12 PD PA PD - PA -30
1355 0.332
IEEE 802.3Z IEEE 802.3Z 9
-20 0.5
dB dB dB
Notes: 8. Deterministic jitter (DJ) and total jitter (TJ) values are measured according to the methods defined in ANSI, T11.2/Project 1230/Rev.10, Fibre Channel-Methodologies for Jitter Specifications (MJS).
9
Transceiver Timing Characteristics
Parameter Tx Disable Assert Time Tx Disable Negate Time Time to initialize, including reset of Tx-Fault Tx Fault Assert Time Tx Disable to Reset LOS Assert Time LOS Deassert Time Serial ID Clock Rate
Symbol t_off t_on t_init
Minimum
Typical
Maximum 10 1 300 100 100 100 100
Unit s Ms Ms s s s s KHz
Notes 9 IEEE 802.3 10 IEEE 802.3 11 12 13 14 15
t_fault t_reset 10 t_loss_on t_loss_off f_serial_ clock
Notes: 9. Time from rising edge of Tx Disable to when the optical output falls below 10% of nominal. 10. Time from falling edge of Tx Disable to when the modulated optical output rises above 90% of nominal. 11. From power on or negation of Tx Fault using Tx Disable. 12. Time from fault to Tx fault on. 13. Time Tx Disable must be held high to reset Tx_fault. 14. Time from LOS state to Rx LOS assert. 15. Time from non-LOS state to RX LOS deassert.
5 4.5 4 RMS spectral width (nm) 3.5 3 2.5 2 1.5 1 0.5 0 1270 Minimum Launched Power -9.5 dBm
1280
1290
1300
1310
1320
1330
1340
1350
1360
Wavelength (nm)
Figure 3. Trade-off curves from FC-PI Rev 13 Note: In order to meet the link power budget the transmitter can trade off OMA, spectral width and center wavelength as shown in Figure 3.
10
Table 3 - EEPROM Serial ID Memory Contents
Addr 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 Hex 03 04 07 00 00 00 02 00 00 00 00 01 0C 00 0A 64 32 32 00 00 41 47 49 4C 45 4E 54 20 20 20 20 20 20 20 20 20 00 00 30 D3 ASCII Addr 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 Hex 48 46 43 54 2D 35 37 ASCII H F C T 5 7 0 1 L Addr 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 Hex ASCII Serial # Serial # Serial # Serial # Serial # Serial # Serial # Serial # Serial # Serial # Serial # Serial # Serial # Serial # Serial # Serial # Datecode Datecode Datecode Datecode Datecode Datecode Datecode Datecode 0 0 0 Checksum Addr 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 Hex ASCII 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20
A G I L E N T
4C 20 20 20 20 20 20 20 20 20 20 00 00 00 Checksum 00 1A 00 00
11
www.agilent.com/ semiconductors
For product information and a complete list of distributors, please go to our web site. For technical assistance call: Americas/Canada: +1 (800) 235-0312 or (408) 654-8675 Europe: +49 (0) 6441 92460 China: 10800 650 0017 Hong Kong: (+65) 6271 2451 India, Australia, New Zealand: (+65) 6271 2394 Japan: (+81 3) 3335-8152(Domestic/International), or 0120-61-1280(Domestic Only) Korea: (+65) 6271 2194 Malaysia, Singapore: (+65) 6271 2054 Taiwan: (+65) 6271 2654 Data subject to change. Copyright (c) 2003 Agilent Technologies, Inc. February 11, 2003 5988-8705EN


▲Up To Search▲   

 
Price & Availability of HFCT-5701LP

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X